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74HC237D

  

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NXP
NXP Semiconductors.
74HC237D 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features and benefits
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ ESD protection:
   ◆ HBM JESD22-A114F exceeds 2 000 V
   ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from -40°C to +85°C and from -40°C to +125°C


other parts : 74HC237  74HC237DB  74HC237N  74HC237N,652  
74HC237D PDF
NXP
NXP Semiconductors.
74HC237D_2004 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
   ◆ HBM EIA/JESD22-A114-B exceeds 2000 V
   ◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.


other parts : 74HC237_2004  74HC237N_2004  74HC237DB_2004  
74HC237D PDF
Philips
Philips Electronics
74HC237D 3-to-8 line decoder / demultiplexer with address latches

GENERAL DESCRIPTION
The 74HC/HCT237 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

FEATURES
• Combines 3-to-8 decoder with 3-bit latch
• Multiple input enable for easy expansion or independent controls
• Active HIGH mutually exclusive outputs
• Output capability: standard
• ICC category: MSI


other parts : 74HC237  74HC237DB  74HC237N  74HCT237  74HCT237D  74HCT237DB  74HCT237N  
74HC237D PDF
NXP
NXP Semiconductors.
74HC237D_2012 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features and benefits
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ ESD protection:
   ◆ HBM JESD22-A114F exceeds 2 000 V
   ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from -40°C to +85°C and from -40°C to +125°C


other parts : 74HC237_2012  74HC237DB_2012  74HC237N_2012  74HC237N,652_2012  
74HC237D PDF
NXP
NXP Semiconductors.
74HC237DB 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features and benefits
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ ESD protection:
   ◆ HBM JESD22-A114F exceeds 2 000 V
   ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from -40°C to +85°C and from -40°C to +125°C


other parts : 74HC237  74HC237D  74HC237N  74HC237N,652  
74HC237DB PDF
NXP
NXP Semiconductors.
74HC237DB_2004 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
   ◆ HBM EIA/JESD22-A114-B exceeds 2000 V
   ◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.


other parts : 74HC237_2004  74HC237N_2004  74HC237D_2004  
74HC237DB PDF
Philips
Philips Electronics
74HC237DB 3-to-8 line decoder / demultiplexer with address latches

GENERAL DESCRIPTION
The 74HC/HCT237 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

FEATURES
• Combines 3-to-8 decoder with 3-bit latch
• Multiple input enable for easy expansion or independent controls
• Active HIGH mutually exclusive outputs
• Output capability: standard
• ICC category: MSI


other parts : 74HC237  74HC237D  74HC237N  74HCT237  74HCT237D  74HCT237DB  74HCT237N  
74HC237DB PDF
NXP
NXP Semiconductors.
74HC237DB_2012 3-to-8 line decoder, demultiplexer with address latches

General description
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.

Features and benefits
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active HIGH mutually exclusive outputs
■ Low-power dissipation
■ ESD protection:
   ◆ HBM JESD22-A114F exceeds 2 000 V
   ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from -40°C to +85°C and from -40°C to +125°C


other parts : 74HC237_2012  74HC237D_2012  74HC237N_2012  74HC237N,652_2012  
74HC237DB PDF

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