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M68AW127B

  

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ST-Microelectronics
STMicroelectronics
M68AW127B 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  M68AW127BL10NK1  
M68AW127B PDF
ST-Microelectronics
STMicroelectronics
M68AW127BL10N1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  M68AW127BL10NK1  
M68AW127BL10N1 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BL70N6 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BL70N6 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BL70N1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BL70N1 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM10N6 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM10N6 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM10N1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM10N1 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM70N6 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM70N6 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM70N1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM70N1 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BL10N6 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6T  M68AW127BL10NK1  
M68AW127BL10N6 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM10N1T 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM10N1T PDF
ST-Microelectronics
STMicroelectronics
M68AW127BM70MC1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BM70MC1 PDF
ST-Microelectronics
STMicroelectronics
M68AW127BL70NK1 1Mbit (128K x8), 3.0V Asynchronous SRAM

SUMMARY DESCRIPTION
The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single
2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 70ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER


other parts : M68AW127  M68AW127B  M68AW127BL10MC1  M68AW127BL10MC1T  M68AW127BL10MC6  M68AW127BL10MC6T  M68AW127BL10N1  M68AW127BL10N1T  M68AW127BL10N6  M68AW127BL10N6T  
M68AW127BL70NK1 PDF

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