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MC74HCT138ADR2

  

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ON-Semiconductor
ON Semiconductor
MC74HCT138ADR2 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs
High–Performance Silicon–Gate CMOS

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The HCT138A decodes a three–bit Address to one–of–eight active–lot outputs. This device features three Chip Select inputs, two active–low and one active–high to facilitate the demultiplexing, cascading, and chip–selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates


other parts : MC74HCT138AD  MC74HCT138ADT  MC74HCT138ADTR2  MC74HCT138AN  MC74HCT138A_00  MC74HCT138AF  MC74HCT138AFEL  MC74HCT138AFL1  MC74HCT138AFR1  MC74HCT138AFR2  
MC74HCT138ADR2 PDF
ONSEMI
ON Semiconductor
MC74HCT138ADR2 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs. The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
• Pb−Free Packages are Available*


other parts : MC74HCT138A  MC74HCT138AD  MC74HCT138ADG  MC74HCT138ADR2G  MC74HCT138ADT  MC74HCT138ADTR2  MC74HCT138AF  MC74HCT138AFEL  MC74HCT138AFL1  MC74HCT138AFR1  
MC74HCT138ADR2 PDF
ON-Semiconductor
ON Semiconductor
MC74HCT138ADR2G 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs
High−Performance Silicon−Gate CMOS

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1.0 A
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant


other parts : MC74HCT138A  MC74HCT138A_15  MC74HCT138ADG  MC74HCT138ADTR2G  
MC74HCT138ADR2G PDF
ONSEMI
ON Semiconductor
MC74HCT138ADR2G 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs. The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
• Pb−Free Packages are Available*


other parts : MC74HCT138A  MC74HCT138AD  MC74HCT138ADG  MC74HCT138ADR2  MC74HCT138ADT  MC74HCT138ADTR2  MC74HCT138AF  MC74HCT138AFEL  MC74HCT138AFL1  MC74HCT138AFR1  
MC74HCT138ADR2G PDF
ON-Semiconductor
ON Semiconductor
MC74HCT138ADR2_05 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs. The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
• Pb−Free Packages are Available*


other parts : MC74HC138A_05  MC74HCT138ADG_05  MC74HCT138ADR2G_05  MC74HCT138ADTR2_05  MC74HCT138AD_05  MC74HCT138ANG  MC74HCT138ANG_05  MC74HCT138AN_05  
MC74HCT138ADR2_05 PDF
ON-Semiconductor
ON Semiconductor
MC74HCT138ADR2G_05 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs

The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs. The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
• Pb−Free Packages are Available*


other parts : MC74HC138A_05  MC74HCT138ADG_05  MC74HCT138ADR2_05  MC74HCT138ADTR2_05  MC74HCT138AD_05  MC74HCT138ANG  MC74HCT138ANG_05  MC74HCT138AN_05  
MC74HCT138ADR2G_05 PDF

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